Chixiao Chen, Ph.D
Ass. Prof in Fudan University, PR China
Contact me by cxchen@fudan.edu.cn
Instructor: Chixiao Chen, Email: cxchen@fudan.edu.cn
Location: Z2209B, Fudan University (Zhangjiang Campus)
Time: Thursday Morning
Prerequisite: Verilog (You have to take courses like 数字逻辑, and finish projects by verilog/sv/chiesel/…)
Score: Homework Assignement (15% x 4)+ Final Project (40%)
The class on 4/25 is moved to 4/23 afternoon, in 新金博 building,Handan Campus, FDU.
| Week | Date | Lecture Title | Reading / Slides | Homework |
|---|---|---|---|---|
| 1 | Feb 28 | Introduction on Computer/AI Architecuture | / | |
| 2 | Mar 7 | Instruction Set, MIPS vs RISC-V | / | |
| 3 | Mar 14 | Single Cycle RV32I, Pipeline-I | HW1 | |
| 4 | Mar 21 | Pipeline - II, Harzards | HW1 Due | |
| 5 | Mar 28 | Memory | / | |
| 6 | Apr 4 | Bus, DMA and Accelerator | HW2 | |
| 7 | Apr 11 | No Class | HW2 Due | |
| 8 | Apr 18 | Introduction for Machine Learning | / | |
| 9 | Apr 23 | Lecture: Von-Neumann Bottle Neck for AI Chips | HW3 | |
| 10 | Apr 29 | Covolutional Neural Network | / | |
| 11 | May 9 | Deep Learning Hardware - CPU/GPU, Winograd | HW3 Due | |
| 12 | May 16 | Deep Learning Hardware - FPGA, Reconfigurable Computing, Data Flows | ||
| 13 | May 23 | No Class | Final Project | |
| 14 | May 23 | No Class | ||
| 15 | Jun 6 | Deep Learning Hardware - Fully Custom ASIC | ||
| 16 | Jun 20 | Presentation Day | Final PJ Due |
The instructor thanks the contributors of the following materials